1. Field of the Invention
This invention relates to a method of configuring an error correcting product code block adapted for use for digital data recording/transmission and, more particularly, it relates to a method of processing data for generating an error correcting product code block devised so as not to change the level of redundancy after the error correcting ability is modified. The present invention also relates to a method of processing data for recording such data on a recording medium as well as to an apparatus for processing such data.
2. Description of the Related Art
In a system for recording digital data by using byte unit, which is equal to eight bits, data are processed by configuring Reed-Solomon error correcting product code blocks. More specifically, after arranging data of (M.times.N) bytes in M rows.times.N columns, a P0-byte error correcting check word is added to the N-byte information section of each column and then a PI-byte error correcting check word is added to the N-byte information section of each row to produce a Reed-Solomon error correcting product code block comprising (M+P0) rows.times.(N+PI) columns. Then, random errors and burst errors can be efficiently corrected on the data reproducing side or the data receiving side by means of the Reed-Solomon error correcting product code blocks that are recorded and transmitted.
A Reed-Solomon error correcting product code block as described above operates efficiently when the redundancy is large or the ratio of the redundant section of the error correcting check word (PI.times.M+P0.times.N+PI.times.P0) to the entire code word (M+P0).times.(N+PI) is small. On the other hand, its error correcting ability is raised for both random errors and burst errors when large values are used for PI and P0.
It is known that, when different Reed-Solomon error correcting product code blocks having a same level of redundancy are compared, those having small M, N, PI and P0 are poorly adapted for error correcting because the probability of occurrence of error correction rises with such code blocks.
On the other hand, while it is also known that the error correcting ability of a Reed-Solomon error correcting product code block is raised by increasing the values of M and N because the values of PI and P0 are also increased accordingly, if the redundancy is held to a same level, such high error correcting ability cannot be realized without satisfying requirements as will be described below.
Firstly, in terms of a code word length that allows a Reed-Solomon code word to be configured, M+P0 and N+PI have to be equal to or less than 255 bytes.
Secondly, there is a hardware cost restriction to be observed. Specifically, it is expressed typically in terms of the cost of the operational circuit and that of the memory for storing the entire code word or (M+P0).times.(N+PI) bytes. Since the cost of a memory can change with the development of semiconductor technology, it is highly desirable to make the above described parameters of M, N, PI and P0 of Reed-Solomon error correcting product code block variable as a function of the advancement of semiconductor technology and, particularly, the reduction in the cost of a memory.
This is because a same error in a physical length or a time length is translated into a larger burst of error bytes as the density in which data are recorded on a medium or the rate at which data are transmitted through a transmission path is raised in accordance with the advancement of semiconductor technology, so that a higher error correcting ability becomes necessary.
Conventionally, however, a Reed-Solomon error correcting product code block having (M+P0).times.(N+PI) bytes is configured for a given data of (M.times.N) bytes so that redundancy is automatically set as a function of the entire size of the product code block. In other words, any attempt for maintaining a given level of error correcting ability is accompanied by a problem of invariable block size.
However, as a higher recording density and a higher transmission rate are expected with the advancement of semiconductor technology in the future, a much higher level of error correcting ability will be required for an error correcting product code block of a given size. This in turn requires the use of a large error correcting check word, which entails an enhanced level of redundancy if conventional technology is used.